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3 #ifndef MINI_HEXAGON_DMA_H
4 #define MINI_HEXAGON_DMA_H
17 #define HALIDE_HEXAGON_ENUM enum __attribute__((aligned(4)))
19 __inline
static int align(
int x,
int a) {
20 return ((x + a - 1) & (~(a - 1)));
33 #define PW_NORMAL_L1 5
71 } t_eDmaWrapper_TransationType;
311 bool bIsUbwc,
uint16 u16IntermBufStride);
signed __INT32_TYPE__ int32_t
int32 nDmaWrapper_GetRecommendedIntermBufStride(t_eDmaFmt eFmtId, t_StDmaWrapper_RoiAlignInfo *pStRoiSize, bool bIsUbwc)
Get the recommended (minimum) intermediate buffer stride for the L2 Cache that is used transfer data ...
int32 nDmaWrapper_DmaTransferSetup(t_DmaWrapper_DmaEngineHandle hDmaHandle, t_StDmaWrapper_DmaTransferSetup *stpDmaTransferParm)
Setup Dma transfer parameters required to be ready to make DMA transfer.
void * HAP_cache_lock(unsigned int size, void **paddr_ptr)
Abstraction for allocation of memory in cache and lock.
unsigned __INT16_TYPE__ uint16_t
struct stDmaWrapper_DmaTransferSetup t_StDmaWrapper_DmaTransferSetup
DmaTransferSetup Properties.
uint16 u16H
Frame height in pixels.
uint16 u16X
ROI x position in pixels.
void * t_stDmaWrapperDmaStats
DMA status Currently not use, for future development.
uint16 u16W
Frame width in pixels.
uint16 u16FrameW
Frame Width in pixels.
uint16 u16Y
ROI y position in pixels.
uint16 u16H
ROI height in pixels.
struct stDmaWrapper_FrameProp t_StDmaWrapper_FrameProp
Frame Properties.
uint16 u16FrameH
Frame height in pixels.
uint16 u16H
ROI height in pixels.
struct stDmaWrapper_Roi t_StDmaWrapper_Roi
Roi Properties.
uint16 u16W
ROI width in pixels.
uint16 u16RoiStride
ROI stride in pixels.
int32 nDmaWrapper_PowerVoting(uint32 cornercase)
DMA power voting based on Cornercase.
uint16 u16Stride
Frame stride in pixels.
#define HALIDE_HEXAGON_ENUM
Format IDs.
uint16 u16RoiX
ROI x position in pixels.
DmaTransferSetup Properties.
uint16 bUse16BitPaddingInL2
Should the intermediate buffer be padded. This only apply for 8bit format sucha NV12,...
int32 nDmaWrapper_FinishFrame(t_DmaWrapper_DmaEngineHandle hDmaHandle)
This call flushes the DMA buffers.
addr_t aAddr
Starting physical address to buffer.
void * pTcmDataBuf
Virtual address of the TCM pixeldata buffer (must be locked in the L2$).
struct stDmaWrapper_RoiAlignInfo t_StDmaWrapper_RoiAlignInfo
Roi alignment.
uint16 u16RoiW
ROI width in pixels.
void * pDescBuf
Virtual address of the HW descriptor buffer (must be locked in the L2$).
t_DmaWrapper_DmaEngineHandle hDmaWrapper_AllocDma(void)
Allocates a DMA Engine to be used by using the default wait type (polling).
unsigned int qurt_mem_pool_t
int32 nDmaWrapper_GetRecommendedWalkSize(t_eDmaFmt eFmtId, bool bIsUbwc, t_StDmaWrapper_RoiAlignInfo *pStWalkSize)
Get the recommended walk ROI width and height that should be used if walking the entire frame.
int HAP_cache_unlock(void *vaddr_ptr)
Abstraction for deallocation of memory and unlock cache.
void * pFrameBuf
Virtual address of the DDR Frame buffer .
uint16 u16FrameStride
Frame stride in pixels.
uint16 u16RoiY
ROI y position in pixels.
int32 nDmaWrapper_GetRecommendedIntermBufSize(t_eDmaFmt eFmtId, bool bUse16BitPaddingInL2, t_StDmaWrapper_RoiAlignInfo *pStRoiSize, bool bIsUbwc, uint16 u16IntermBufStride)
Get the recommended intermediate buffer size for the L2 cache that is used to transfer data to/from D...
void * t_DmaWrapper_DmaEngineHandle
Handle for wrapper DMA engine.
int32 nDmaWrapper_FreeDma(t_DmaWrapper_DmaEngineHandle hDmaHandle)
Frees a DMA Engine that was previously allocated by AllocDma().
int32 nDmaWrapper_Move(t_DmaWrapper_DmaEngineHandle hDmaHandle)
Starts a transfer on the provided DMA engine.
uint16 u16W
ROI width in pixels.
int32 nDmaWrapper_Wait(t_DmaWrapper_DmaEngineHandle hDmaHandle)
Blocks until all outstanding transfers on the DMA are complete.
t_eDmaWrapper_TransationType eTransferType
TransferType: eDmaWrapper_DdrToL2 (Read from DDR), eDmaWrapper_L2ToDDR (Write to DDR);.
unsigned __INT32_TYPE__ uint32_t
uint16 u16RoiH
ROI height in pixels.
int32 nDmaWrapper_GetDescbuffsize(t_eDmaFmt *aeFmtId, uint16 nsize)
Calculates the HW descriptor buffer size based on the formats that will be used with the engine.
HALIDE_HEXAGON_ENUM eDmaWrapper_TransationType
Transfer type.