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Halide::Stage Class Reference

A single definition of a Func. More...

#include <Func.h>

Public Member Functions

 Stage (Internal::Definition d, const std::string &n, const std::vector< Var > &args, const std::vector< Internal::StorageDim > &sdims)
 
 Stage (Internal::Definition d, const std::string &n, const std::vector< std::string > &args, const std::vector< Internal::StorageDim > &sdims)
 
const Internal::Scheduleget_schedule () const
 Return the current Schedule associated with this Stage. More...
 
EXPORT std::string dump_argument_list () const
 Return a string describing the current var list taking into account all the splits, reorders, and tiles. More...
 
EXPORT const std::string & name () const
 Return the name of this stage, e.g. More...
 
EXPORT Func rfactor (std::vector< std::pair< RVar, Var >> preserved)
 Calling rfactor() on an associative update definition a Func will split the update into an intermediate which computes the partial results and replaces the current update definition with a new definition which merges the partial results. More...
 
EXPORT Func rfactor (RVar r, Var v)
 Calling rfactor() on an associative update definition a Func will split the update into an intermediate which computes the partial results and replaces the current update definition with a new definition which merges the partial results. More...
 
EXPORT Stagesplit (VarOrRVar old, VarOrRVar outer, VarOrRVar inner, Expr factor, TailStrategy tail=TailStrategy::Auto)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagefuse (VarOrRVar inner, VarOrRVar outer, VarOrRVar fused)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stageserial (VarOrRVar var)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stageparallel (VarOrRVar var)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagevectorize (VarOrRVar var)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stageunroll (VarOrRVar var)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stageparallel (VarOrRVar var, Expr task_size, TailStrategy tail=TailStrategy::Auto)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagevectorize (VarOrRVar var, Expr factor, TailStrategy tail=TailStrategy::Auto)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stageunroll (VarOrRVar var, Expr factor, TailStrategy tail=TailStrategy::Auto)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagetile (VarOrRVar x, VarOrRVar y, VarOrRVar xo, VarOrRVar yo, VarOrRVar xi, VarOrRVar yi, Expr xfactor, Expr yfactor, TailStrategy tail=TailStrategy::Auto)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagetile (VarOrRVar x, VarOrRVar y, VarOrRVar xi, VarOrRVar yi, Expr xfactor, Expr yfactor, TailStrategy tail=TailStrategy::Auto)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagereorder (const std::vector< VarOrRVar > &vars)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
template<typename... Args>
NO_INLINE std::enable_if
< Internal::all_are_convertible
< VarOrRVar, Args...>::value,
Stage & >::type 
reorder (VarOrRVar x, VarOrRVar y, Args &&...args)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagerename (VarOrRVar old_name, VarOrRVar new_name)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stage specialize (Expr condition)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT void specialize_fail (const std::string &message)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagegpu_threads (VarOrRVar thread_x, DeviceAPI device_api=DeviceAPI::Default_GPU)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagegpu_threads (VarOrRVar thread_x, VarOrRVar thread_y, DeviceAPI device_api=DeviceAPI::Default_GPU)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagegpu_threads (VarOrRVar thread_x, VarOrRVar thread_y, VarOrRVar thread_z, DeviceAPI device_api=DeviceAPI::Default_GPU)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagegpu_single_thread (DeviceAPI device_api=DeviceAPI::Default_GPU)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagegpu_blocks (VarOrRVar block_x, DeviceAPI device_api=DeviceAPI::Default_GPU)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagegpu_blocks (VarOrRVar block_x, VarOrRVar block_y, DeviceAPI device_api=DeviceAPI::Default_GPU)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagegpu_blocks (VarOrRVar block_x, VarOrRVar block_y, VarOrRVar block_z, DeviceAPI device_api=DeviceAPI::Default_GPU)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagegpu (VarOrRVar block_x, VarOrRVar thread_x, DeviceAPI device_api=DeviceAPI::Default_GPU)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagegpu (VarOrRVar block_x, VarOrRVar block_y, VarOrRVar thread_x, VarOrRVar thread_y, DeviceAPI device_api=DeviceAPI::Default_GPU)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagegpu (VarOrRVar block_x, VarOrRVar block_y, VarOrRVar block_z, VarOrRVar thread_x, VarOrRVar thread_y, VarOrRVar thread_z, DeviceAPI device_api=DeviceAPI::Default_GPU)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagegpu_tile (VarOrRVar x, VarOrRVar bx, Var tx, Expr x_size, TailStrategy tail=TailStrategy::Auto, DeviceAPI device_api=DeviceAPI::Default_GPU)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagegpu_tile (VarOrRVar x, VarOrRVar bx, RVar tx, Expr x_size, TailStrategy tail=TailStrategy::Auto, DeviceAPI device_api=DeviceAPI::Default_GPU)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagegpu_tile (VarOrRVar x, VarOrRVar tx, Expr x_size, TailStrategy tail=TailStrategy::Auto, DeviceAPI device_api=DeviceAPI::Default_GPU)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagegpu_tile (VarOrRVar x, VarOrRVar y, VarOrRVar bx, VarOrRVar by, VarOrRVar tx, VarOrRVar ty, Expr x_size, Expr y_size, TailStrategy tail=TailStrategy::Auto, DeviceAPI device_api=DeviceAPI::Default_GPU)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagegpu_tile (VarOrRVar x, VarOrRVar y, VarOrRVar tx, Var ty, Expr x_size, Expr y_size, TailStrategy tail=TailStrategy::Auto, DeviceAPI device_api=DeviceAPI::Default_GPU)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagegpu_tile (VarOrRVar x, VarOrRVar y, VarOrRVar tx, RVar ty, Expr x_size, Expr y_size, TailStrategy tail=TailStrategy::Auto, DeviceAPI device_api=DeviceAPI::Default_GPU)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagegpu_tile (VarOrRVar x, VarOrRVar y, VarOrRVar z, VarOrRVar bx, VarOrRVar by, VarOrRVar bz, VarOrRVar tx, VarOrRVar ty, VarOrRVar tz, Expr x_size, Expr y_size, Expr z_size, TailStrategy tail=TailStrategy::Auto, DeviceAPI device_api=DeviceAPI::Default_GPU)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagegpu_tile (VarOrRVar x, VarOrRVar y, VarOrRVar z, VarOrRVar tx, VarOrRVar ty, VarOrRVar tz, Expr x_size, Expr y_size, Expr z_size, TailStrategy tail=TailStrategy::Auto, DeviceAPI device_api=DeviceAPI::Default_GPU)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagegpu_tile (VarOrRVar x, Expr x_size, TailStrategy tail=TailStrategy::Auto, DeviceAPI device_api=DeviceAPI::Default_GPU)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagegpu_tile (VarOrRVar x, VarOrRVar y, Expr x_size, Expr y_size, TailStrategy tail=TailStrategy::Auto, DeviceAPI device_api=DeviceAPI::Default_GPU)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagegpu_tile (VarOrRVar x, VarOrRVar y, VarOrRVar z, Expr x_size, Expr y_size, Expr z_size, TailStrategy tail=TailStrategy::Auto, DeviceAPI device_api=DeviceAPI::Default_GPU)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stageallow_race_conditions ()
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stagehexagon (VarOrRVar x=Var::outermost())
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stageprefetch (const Func &f, VarOrRVar var, Expr offset=1, PrefetchBoundStrategy strategy=PrefetchBoundStrategy::GuardWithIf)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
EXPORT Stageprefetch (const Internal::Parameter &param, VarOrRVar var, Expr offset=1, PrefetchBoundStrategy strategy=PrefetchBoundStrategy::GuardWithIf)
 Scheduling calls that control how the domain of this stage is traversed. More...
 
template<typename T >
Stageprefetch (const T &image, VarOrRVar var, Expr offset=1, PrefetchBoundStrategy strategy=PrefetchBoundStrategy::GuardWithIf)
 Scheduling calls that control how the domain of this stage is traversed. More...
 

Detailed Description

A single definition of a Func.

May be a pure or update definition.

Definition at line 52 of file Func.h.

Constructor & Destructor Documentation

Halide::Stage::Stage ( Internal::Definition  d,
const std::string &  n,
const std::vector< Var > &  args,
const std::vector< Internal::StorageDim > &  sdims 
)
inline
Halide::Stage::Stage ( Internal::Definition  d,
const std::string &  n,
const std::vector< std::string > &  args,
const std::vector< Internal::StorageDim > &  sdims 
)
inline

Member Function Documentation

const Internal::Schedule& Halide::Stage::get_schedule ( ) const
inline

Return the current Schedule associated with this Stage.

For introspection only: to modify Schedule, use the Func interface.

Definition at line 88 of file Func.h.

References Halide::Internal::Definition::schedule().

EXPORT std::string Halide::Stage::dump_argument_list ( ) const

Return a string describing the current var list taking into account all the splits, reorders, and tiles.

EXPORT const std::string& Halide::Stage::name ( ) const

Return the name of this stage, e.g.

"f.update(2)"

EXPORT Func Halide::Stage::rfactor ( std::vector< std::pair< RVar, Var >>  preserved)

Calling rfactor() on an associative update definition a Func will split the update into an intermediate which computes the partial results and replaces the current update definition with a new definition which merges the partial results.

If called on a init/pure definition, this will throw an error. rfactor() will automatically infer the associative reduction operator and identity of the operator. If it can't prove the operation is associative or if it cannot find an identity for that operator, this will throw an error. In addition, commutativity of the operator is required if rfactor() is called on the inner dimension but excluding the outer dimensions.

rfactor() takes as input 'preserved', which is a list of <RVar, Var> pairs. The rvars not listed in 'preserved' are removed from the original Func and are lifted to the intermediate Func. The remaining rvars (the ones in 'preserved') are made pure in the intermediate Func. The intermediate Func's update definition inherits all scheduling directives (e.g. split,fuse, etc.) applied to the original Func's update definition. The loop order of the intermediate Func's update definition is the same as the original, although the RVars in 'preserved' are replaced by the new pure Vars. The loop order of the intermediate Func's init definition from innermost to outermost is the args' order of the original Func's init definition followed by the new pure Vars.

The intermediate Func also inherits storage order from the original Func with the new pure Vars added to the outermost.

For example, f.update(0).rfactor({{r.y, u}}) would rewrite a pipeline like this:

f(x, y) = 0;
f(x, y) += g(r.x, r.y);

into a pipeline like this:

f_intm(x, y, u) = 0;
f_intm(x, y, u) += g(r.x, u);
f(x, y) = 0;
f(x, y) += f_intm(x, y, r.y);

This has a variety of uses. You can use it to split computation of an associative reduction:

f(x, y) = 10;
RDom r(0, 96);
f(x, y) = max(f(x, y), g(x, y, r.x));
f.update(0).split(r.x, rxo, rxi, 8).reorder(y, x).parallel(x);
f.update(0).rfactor({{rxo, u}}).compute_root().parallel(u).update(0).parallel(u);

, which is equivalent to:

parallel for u = 0 to 11:
for y:
for x:
f_intm(x, y, u) = -inf
parallel for x:
for y:
parallel for u = 0 to 11:
for rxi = 0 to 7:
f_intm(x, y, u) = max(f_intm(x, y, u), g(8*u + rxi))
for y:
for x:
f(x, y) = 10
parallel for x:
for y:
for rxo = 0 to 11:
f(x, y) = max(f(x, y), f_intm(x, y, u))
EXPORT Func Halide::Stage::rfactor ( RVar  r,
Var  v 
)

Calling rfactor() on an associative update definition a Func will split the update into an intermediate which computes the partial results and replaces the current update definition with a new definition which merges the partial results.

If called on a init/pure definition, this will throw an error. rfactor() will automatically infer the associative reduction operator and identity of the operator. If it can't prove the operation is associative or if it cannot find an identity for that operator, this will throw an error. In addition, commutativity of the operator is required if rfactor() is called on the inner dimension but excluding the outer dimensions.

rfactor() takes as input 'preserved', which is a list of <RVar, Var> pairs. The rvars not listed in 'preserved' are removed from the original Func and are lifted to the intermediate Func. The remaining rvars (the ones in 'preserved') are made pure in the intermediate Func. The intermediate Func's update definition inherits all scheduling directives (e.g. split,fuse, etc.) applied to the original Func's update definition. The loop order of the intermediate Func's update definition is the same as the original, although the RVars in 'preserved' are replaced by the new pure Vars. The loop order of the intermediate Func's init definition from innermost to outermost is the args' order of the original Func's init definition followed by the new pure Vars.

The intermediate Func also inherits storage order from the original Func with the new pure Vars added to the outermost.

For example, f.update(0).rfactor({{r.y, u}}) would rewrite a pipeline like this:

f(x, y) = 0;
f(x, y) += g(r.x, r.y);

into a pipeline like this:

f_intm(x, y, u) = 0;
f_intm(x, y, u) += g(r.x, u);
f(x, y) = 0;
f(x, y) += f_intm(x, y, r.y);

This has a variety of uses. You can use it to split computation of an associative reduction:

f(x, y) = 10;
RDom r(0, 96);
f(x, y) = max(f(x, y), g(x, y, r.x));
f.update(0).split(r.x, rxo, rxi, 8).reorder(y, x).parallel(x);
f.update(0).rfactor({{rxo, u}}).compute_root().parallel(u).update(0).parallel(u);

, which is equivalent to:

parallel for u = 0 to 11:
for y:
for x:
f_intm(x, y, u) = -inf
parallel for x:
for y:
parallel for u = 0 to 11:
for rxi = 0 to 7:
f_intm(x, y, u) = max(f_intm(x, y, u), g(8*u + rxi))
for y:
for x:
f(x, y) = 10
parallel for x:
for y:
for rxo = 0 to 11:
f(x, y) = max(f(x, y), f_intm(x, y, u))
EXPORT Stage& Halide::Stage::split ( VarOrRVar  old,
VarOrRVar  outer,
VarOrRVar  inner,
Expr  factor,
TailStrategy  tail = TailStrategy::Auto 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

EXPORT Stage& Halide::Stage::fuse ( VarOrRVar  inner,
VarOrRVar  outer,
VarOrRVar  fused 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

Referenced by Halide::Func::operator()().

EXPORT Stage& Halide::Stage::serial ( VarOrRVar  var)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

Referenced by Halide::Func::operator()().

EXPORT Stage& Halide::Stage::parallel ( VarOrRVar  var)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

Referenced by Halide::Func::operator()().

EXPORT Stage& Halide::Stage::vectorize ( VarOrRVar  var)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

Examples:
tutorial/lesson_09_update_definitions.cpp.

Referenced by Halide::Func::operator()().

EXPORT Stage& Halide::Stage::unroll ( VarOrRVar  var)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

Referenced by Halide::Func::operator()().

EXPORT Stage& Halide::Stage::parallel ( VarOrRVar  var,
Expr  task_size,
TailStrategy  tail = TailStrategy::Auto 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

EXPORT Stage& Halide::Stage::vectorize ( VarOrRVar  var,
Expr  factor,
TailStrategy  tail = TailStrategy::Auto 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

EXPORT Stage& Halide::Stage::unroll ( VarOrRVar  var,
Expr  factor,
TailStrategy  tail = TailStrategy::Auto 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

EXPORT Stage& Halide::Stage::tile ( VarOrRVar  x,
VarOrRVar  y,
VarOrRVar  xo,
VarOrRVar  yo,
VarOrRVar  xi,
VarOrRVar  yi,
Expr  xfactor,
Expr  yfactor,
TailStrategy  tail = TailStrategy::Auto 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

Referenced by Halide::Func::operator()().

EXPORT Stage& Halide::Stage::tile ( VarOrRVar  x,
VarOrRVar  y,
VarOrRVar  xi,
VarOrRVar  yi,
Expr  xfactor,
Expr  yfactor,
TailStrategy  tail = TailStrategy::Auto 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

EXPORT Stage& Halide::Stage::reorder ( const std::vector< VarOrRVar > &  vars)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

Referenced by Halide::Func::operator()(), reorder(), and Halide::Func::reorder().

template<typename... Args>
NO_INLINE std::enable_if<Internal::all_are_convertible<VarOrRVar, Args...>::value, Stage &>::type Halide::Stage::reorder ( VarOrRVar  x,
VarOrRVar  y,
Args &&...  args 
)
inline

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

Definition at line 197 of file Func.h.

References allow_race_conditions(), Halide::Auto, Halide::Default_GPU, EXPORT, gpu(), gpu_blocks(), gpu_single_thread(), gpu_threads(), gpu_tile(), Halide::GuardWithIf, hexagon(), Halide::Var::outermost(), prefetch(), rename(), reorder(), specialize(), and specialize_fail().

EXPORT Stage& Halide::Stage::rename ( VarOrRVar  old_name,
VarOrRVar  new_name 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

Referenced by reorder(), and Halide::Func::reorder().

EXPORT Stage Halide::Stage::specialize ( Expr  condition)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

Referenced by reorder(), and Halide::Func::reorder().

EXPORT void Halide::Stage::specialize_fail ( const std::string &  message)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

Referenced by reorder(), and Halide::Func::reorder().

EXPORT Stage& Halide::Stage::gpu_threads ( VarOrRVar  thread_x,
DeviceAPI  device_api = DeviceAPI::Default_GPU 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

Referenced by reorder(), and Halide::Func::reorder().

EXPORT Stage& Halide::Stage::gpu_threads ( VarOrRVar  thread_x,
VarOrRVar  thread_y,
DeviceAPI  device_api = DeviceAPI::Default_GPU 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

EXPORT Stage& Halide::Stage::gpu_threads ( VarOrRVar  thread_x,
VarOrRVar  thread_y,
VarOrRVar  thread_z,
DeviceAPI  device_api = DeviceAPI::Default_GPU 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

EXPORT Stage& Halide::Stage::gpu_single_thread ( DeviceAPI  device_api = DeviceAPI::Default_GPU)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

Referenced by reorder(), and Halide::Func::reorder().

EXPORT Stage& Halide::Stage::gpu_blocks ( VarOrRVar  block_x,
DeviceAPI  device_api = DeviceAPI::Default_GPU 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

Referenced by reorder(), and Halide::Func::reorder().

EXPORT Stage& Halide::Stage::gpu_blocks ( VarOrRVar  block_x,
VarOrRVar  block_y,
DeviceAPI  device_api = DeviceAPI::Default_GPU 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

EXPORT Stage& Halide::Stage::gpu_blocks ( VarOrRVar  block_x,
VarOrRVar  block_y,
VarOrRVar  block_z,
DeviceAPI  device_api = DeviceAPI::Default_GPU 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

EXPORT Stage& Halide::Stage::gpu ( VarOrRVar  block_x,
VarOrRVar  thread_x,
DeviceAPI  device_api = DeviceAPI::Default_GPU 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

Referenced by reorder(), and Halide::Func::reorder().

EXPORT Stage& Halide::Stage::gpu ( VarOrRVar  block_x,
VarOrRVar  block_y,
VarOrRVar  thread_x,
VarOrRVar  thread_y,
DeviceAPI  device_api = DeviceAPI::Default_GPU 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

EXPORT Stage& Halide::Stage::gpu ( VarOrRVar  block_x,
VarOrRVar  block_y,
VarOrRVar  block_z,
VarOrRVar  thread_x,
VarOrRVar  thread_y,
VarOrRVar  thread_z,
DeviceAPI  device_api = DeviceAPI::Default_GPU 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

EXPORT Stage& Halide::Stage::gpu_tile ( VarOrRVar  x,
VarOrRVar  bx,
Var  tx,
Expr  x_size,
TailStrategy  tail = TailStrategy::Auto,
DeviceAPI  device_api = DeviceAPI::Default_GPU 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

Referenced by reorder(), and Halide::Func::reorder().

EXPORT Stage& Halide::Stage::gpu_tile ( VarOrRVar  x,
VarOrRVar  bx,
RVar  tx,
Expr  x_size,
TailStrategy  tail = TailStrategy::Auto,
DeviceAPI  device_api = DeviceAPI::Default_GPU 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

EXPORT Stage& Halide::Stage::gpu_tile ( VarOrRVar  x,
VarOrRVar  tx,
Expr  x_size,
TailStrategy  tail = TailStrategy::Auto,
DeviceAPI  device_api = DeviceAPI::Default_GPU 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

EXPORT Stage& Halide::Stage::gpu_tile ( VarOrRVar  x,
VarOrRVar  y,
VarOrRVar  bx,
VarOrRVar  by,
VarOrRVar  tx,
VarOrRVar  ty,
Expr  x_size,
Expr  y_size,
TailStrategy  tail = TailStrategy::Auto,
DeviceAPI  device_api = DeviceAPI::Default_GPU 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

EXPORT Stage& Halide::Stage::gpu_tile ( VarOrRVar  x,
VarOrRVar  y,
VarOrRVar  tx,
Var  ty,
Expr  x_size,
Expr  y_size,
TailStrategy  tail = TailStrategy::Auto,
DeviceAPI  device_api = DeviceAPI::Default_GPU 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

EXPORT Stage& Halide::Stage::gpu_tile ( VarOrRVar  x,
VarOrRVar  y,
VarOrRVar  tx,
RVar  ty,
Expr  x_size,
Expr  y_size,
TailStrategy  tail = TailStrategy::Auto,
DeviceAPI  device_api = DeviceAPI::Default_GPU 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

EXPORT Stage& Halide::Stage::gpu_tile ( VarOrRVar  x,
VarOrRVar  y,
VarOrRVar  z,
VarOrRVar  bx,
VarOrRVar  by,
VarOrRVar  bz,
VarOrRVar  tx,
VarOrRVar  ty,
VarOrRVar  tz,
Expr  x_size,
Expr  y_size,
Expr  z_size,
TailStrategy  tail = TailStrategy::Auto,
DeviceAPI  device_api = DeviceAPI::Default_GPU 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

EXPORT Stage& Halide::Stage::gpu_tile ( VarOrRVar  x,
VarOrRVar  y,
VarOrRVar  z,
VarOrRVar  tx,
VarOrRVar  ty,
VarOrRVar  tz,
Expr  x_size,
Expr  y_size,
Expr  z_size,
TailStrategy  tail = TailStrategy::Auto,
DeviceAPI  device_api = DeviceAPI::Default_GPU 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

EXPORT Stage& Halide::Stage::gpu_tile ( VarOrRVar  x,
Expr  x_size,
TailStrategy  tail = TailStrategy::Auto,
DeviceAPI  device_api = DeviceAPI::Default_GPU 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

EXPORT Stage& Halide::Stage::gpu_tile ( VarOrRVar  x,
VarOrRVar  y,
Expr  x_size,
Expr  y_size,
TailStrategy  tail = TailStrategy::Auto,
DeviceAPI  device_api = DeviceAPI::Default_GPU 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

EXPORT Stage& Halide::Stage::gpu_tile ( VarOrRVar  x,
VarOrRVar  y,
VarOrRVar  z,
Expr  x_size,
Expr  y_size,
Expr  z_size,
TailStrategy  tail = TailStrategy::Auto,
DeviceAPI  device_api = DeviceAPI::Default_GPU 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

EXPORT Stage& Halide::Stage::allow_race_conditions ( )

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

Referenced by reorder(), and Halide::Func::reorder().

EXPORT Stage& Halide::Stage::hexagon ( VarOrRVar  x = Var::outermost())

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

Referenced by reorder(), and Halide::Func::reorder().

EXPORT Stage& Halide::Stage::prefetch ( const Func f,
VarOrRVar  var,
Expr  offset = 1,
PrefetchBoundStrategy  strategy = PrefetchBoundStrategy::GuardWithIf 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

Referenced by prefetch(), Halide::Func::prefetch(), reorder(), and Halide::Func::reorder().

EXPORT Stage& Halide::Stage::prefetch ( const Internal::Parameter param,
VarOrRVar  var,
Expr  offset = 1,
PrefetchBoundStrategy  strategy = PrefetchBoundStrategy::GuardWithIf 
)

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

template<typename T >
Stage& Halide::Stage::prefetch ( const T &  image,
VarOrRVar  var,
Expr  offset = 1,
PrefetchBoundStrategy  strategy = PrefetchBoundStrategy::GuardWithIf 
)
inline

Scheduling calls that control how the domain of this stage is traversed.

See the documentation for Func for the meanings.

Definition at line 293 of file Func.h.

References prefetch().


The documentation for this class was generated from the following file: