Go to the documentation of this file. 1 #ifndef HALIDE_TARGET_H
2 #define HALIDE_TARGET_H
176 for (
const auto &f : initial_features) {
181 Target(
OS o,
Arch a,
int b,
const std::vector<Feature> &initial_features = std::vector<Feature>())
196 explicit Target(
const std::string &s);
197 explicit Target(
const char *s);
209 void set_features(
const std::vector<Feature> &features_to_set,
bool value =
true);
265 return os == other.
os &&
269 features == other.features;
273 return !(*
this == other);
306 template<
typename data_t>
358 std::bitset<FeatureEnd> features;
@ halide_target_feature_no_bounds_query
Disable the bounds querying functionality.
bool has_unknowns() const
Return true if any of the arch/bits/os fields are "unknown"/0; return false otherwise.
@ halide_target_feature_cl_half
Enable half support on OpenCL targets.
halide_target_feature_t
Optional features a compilation Target can have.
bool has_feature(Feature f) const
bool features_all_of(const std::vector< Feature > &test_features) const
@ halide_target_feature_sve
Enable ARM Scalable Vector Extensions.
bool operator!=(const Target &other) const
@ halide_target_feature_vulkan
Enable Vulkan runtime support.
@ BdVer1
Tune for AMD Bobcat CPU (AMD Family 14h, launched 2011).
int get_vulkan_capability_lower_bound() const
Get the minimum Vulkan capability found as an integer.
Target get_host_target()
Return the target corresponding to the host machine.
@ halide_target_feature_asan
Enable hooks for ASAN support.
@ ZnVer1
Tune for AMD Jaguar CPU (AMD Family 16h, launched 2013).
int vector_bits
The bit-width of a vector register for targets where this is configurable and targeting a fixed size ...
@ BtVer2
Tune for AMD Excavator CPU (AMD Family 15h (4th-gen), launched 2015).
@ halide_target_feature_vulkan_version10
Enable Vulkan v1.0 runtime target support.
Target::Feature target_feature_for_device_api(DeviceAPI api)
Get the Target feature corresponding to a DeviceAPI.
@ BdVer3
Tune for AMD Piledriver CPU (AMD Family 15h (2nd-gen), launched 2012).
@ halide_target_feature_sse41
Use SSE 4.1 and earlier instructions. Only relevant on x86.
const std::bitset< FeatureEnd > & get_features_bitset() const
Return a bitset of the Featuress set in this Target (set = 1).
static Target::Feature feature_from_name(const std::string &name)
Return the feature corresponding to a given name, in the form used to construct Target strings (e....
@ halide_target_feature_d3d12compute
Enable Direct3D 12 Compute runtime.
bool supports_type(const Type &t) const
Does this target allow using a certain type.
Feature
Optional features a target can have.
@ halide_target_feature_no_runtime
Do not include a copy of the Halide runtime in any generated object file or assembly.
@ halide_target_feature_cuda_capability32
Enable CUDA compute capability 3.2 (Tegra K1)
void set_feature(Feature f, bool value=true)
@ halide_target_feature_profile_by_timer
Alternative to halide_target_feature_profile using timer interrupt for systems without threads or app...
std::string to_string() const
Convert the Target into a string form that can be reconstituted by merge_string(),...
@ halide_target_feature_vulkan_version13
Enable Vulkan v1.3 runtime target support.
@ halide_target_feature_embed_bitcode
Emulate clang -fembed-bitcode flag.
@ halide_target_feature_trace_stores
Trace all stores done by the pipeline. Equivalent to calling Func::trace_stores on every non-inlined ...
Target get_target_from_environment()
Return the target that Halide will use.
@ halide_target_feature_armv7s
Generate code for ARMv7s. Only relevant for 32-bit ARM.
@ halide_target_feature_msan
Enable hooks for MSAN support.
bool has_gpu_feature() const
Is a fully feature GPU compute runtime enabled? I.e.
@ ProcessorGeneric
Do not tune for any specific CPU. In practice, this means that halide will decide the tune CPU based ...
@ halide_target_feature_armv81a
Enable ARMv8.1-a instructions.
@ halide_target_feature_tsan
Enable hooks for TSAN support.
int bits
The bit-width of the target machine.
@ halide_target_feature_fma
Enable x86 FMA instruction.
@ halide_target_feature_hvx_v65
Enable Hexagon v65 architecture.
@ halide_target_feature_cl_doubles
Enable double support on OpenCL targets.
unsigned __INT64_TYPE__ uint64_t
@ BdVer4
Tune for AMD Steamroller CPU (AMD Family 15h (3nd-gen), launched 2014).
Types in the halide type system.
This file defines the class FunctionDAG, which is our representation of a Halide pipeline,...
@ halide_target_feature_openglcompute
Enable OpenGL Compute runtime. NOTE: This feature is deprecated and will be removed in Halide 17.
DeviceAPI get_required_device_api() const
If this Target (including all Features) requires a specific DeviceAPI, return it.
@ halide_target_feature_wasm_threads
Enable use of threads in WebAssembly codegen. Requires the use of a wasm runtime that provides pthrea...
@ halide_target_feature_spirv
Enable SPIR-V code generation support.
OS
The operating system used by the target.
bool supports_device_api(DeviceAPI api) const
Returns whether a particular device API can be used with this Target.
@ halide_target_feature_profile
Launch a sampling profiler alongside the Halide pipeline that monitors and reports the runtime used b...
@ ZnVer3
Tune for AMD Zen 2 CPU (AMD Family 17h, launched 2019).
@ halide_target_feature_avx2
Use AVX 2 instructions. Only relevant on x86.
@ halide_target_feature_avx512
Enable the base AVX512 subset supported by all AVX512 architectures. The specific feature sets are AV...
@ halide_target_feature_semihosting
Used together with Target::NoOS for the baremetal target built with semihosting library and run with ...
int natural_vector_size() const
Given a data type, return an estimate of the "natural" vector size for that data type when compiling ...
@ halide_target_feature_end
A sentinel. Every target is considered to have this feature, and setting this feature does nothing.
@ BtVer1
Tune for AMD K10 "Barcelona" CPU (AMD Family 10h, launched 2007).
int64_t maximum_buffer_size() const
Return the maximum buffer size in bytes supported on this Target.
@ halide_target_feature_avx512_skylake
Enable the AVX512 features supported by Skylake Xeon server processors. This adds AVX512-VL,...
@ halide_target_feature_vulkan_int64
Enable Vulkan 64-bit integer support.
@ halide_target_feature_strict_float
Turn off all non-IEEE floating-point optimization. Currently applies only to LLVM targets.
@ halide_target_feature_wasm_simd128
Enable +simd128 instructions for WebAssembly codegen.
@ halide_target_feature_user_context
Generated code takes a user_context pointer as first argument.
bool operator==(const Target &other) const
@ ZnVer2
Tune for AMD Zen CPU (AMD Family 17h, launched 2017).
enum Halide::Target::OS os
@ halide_target_feature_jit
Generate code that will run immediately inside the calling process.
@ halide_target_feature_arm_fp16
Enable ARMv8.2-a half-precision floating point data processing.
@ K8_SSE3
Tune for AMD K8 Hammer CPU (AMD Family 0Fh, launched 2003).
static std::string feature_to_name(Target::Feature feature)
Return the name corresponding to a given Feature, in the form used to construct Target strings (e....
@ halide_target_feature_no_asserts
Disable all runtime checks, for slightly tighter code.
signed __INT64_TYPE__ int64_t
@ halide_target_feature_wasm_signext
Enable +sign-ext instructions for WebAssembly codegen.
@ halide_target_feature_no_neon
Avoid using NEON instructions. Only relevant for 32-bit ARM.
@ halide_target_feature_hvx_v66
Enable Hexagon v66 architecture.
@ AMDFam10
Tune for later versions of AMD K8 CPU, with SSE3 support.
@ halide_target_feature_power_arch_2_07
Use POWER ISA 2.07 new instructions. Only relevant on POWERPC.
@ halide_target_feature_large_buffers
Enable 64-bit buffer indexing to support buffers > 2GB. Ignored if bits != 64.
@ halide_target_feature_opencl
Enable the OpenCL runtime.
Processor
The specific processor to be targeted, tuned for.
@ halide_target_feature_enable_llvm_loop_opt
Enable loop vectorization + unrolling in LLVM. Overrides halide_target_feature_disable_llvm_loop_opt....
static bool validate_target_string(const std::string &s)
Check if a target string is valid.
@ halide_target_feature_cuda_capability61
Enable CUDA compute capability 6.1 (Pascal)
@ halide_target_feature_trace_pipeline
Trace the pipeline.
@ halide_target_feature_cuda_capability75
Enable CUDA compute capability 7.5 (Turing)
enum Halide::Target::Processor processor_tune
@ halide_target_feature_cuda_capability50
Enable CUDA compute capability 5.0 (Maxwell)
@ halide_target_feature_trace_realizations
Trace all realizations done by the pipeline. Equivalent to calling Func::trace_realizations on every ...
@ halide_target_feature_hvx_128
Enable HVX 128 byte mode.
void set_features(const std::vector< Feature > &features_to_set, bool value=true)
@ halide_target_feature_cuda_capability86
Enable CUDA compute capability 8.6 (Ampere)
@ halide_target_feature_vulkan_int8
Enable Vulkan 8-bit integer support.
@ halide_target_feature_webgpu
Enable the WebGPU runtime.
@ halide_target_feature_cuda_capability70
Enable CUDA compute capability 7.0 (Volta)
@ halide_target_feature_cuda_capability35
Enable CUDA compute capability 3.5 (Kepler)
bool supported() const
Was libHalide compiled with support for this target?
@ halide_target_feature_cuda_capability30
Enable CUDA compute capability 3.0 (Kepler)
@ halide_target_feature_vulkan_float16
Enable Vulkan 16-bit float support.
@ halide_target_feature_cl_atomic64
Enable 64-bit atomics operations on OpenCL targets.
@ halide_target_feature_debug
Turn on debug info and output for runtime code.
@ halide_target_feature_wasm_bulk_memory
Enable +bulk-memory instructions for WebAssembly codegen.
@ halide_target_feature_avx
Use AVX 1 instructions. Only relevant on x86.
Arch
The architecture used by the target.
@ halide_target_feature_soft_float_abi
Enable soft float ABI. This only enables the soft float ABI calling convention, which does not necess...
Target with_feature(Feature f) const
Return a copy of the target with the given feature set.
@ halide_target_feature_cuda
Enable the CUDA runtime. Defaults to compute capability 2.0 (Fermi)
@ halide_target_feature_fuzz_float_stores
On every floating point store, set the last bit of the mantissa to zero. Pipelines for which the outp...
@ halide_target_feature_avx512_knl
Enable the AVX512 features supported by Knight's Landing chips, such as the Xeon Phi x200....
@ halide_target_feature_cuda_capability80
Enable CUDA compute capability 8.0 (Ampere)
@ halide_target_feature_check_unsafe_promises
Insert assertions for promises.
Target get_jit_target_from_environment()
Return the target that Halide will use for jit-compilation.
@ halide_target_feature_vulkan_version12
Enable Vulkan v1.2 runtime target support.
enum Halide::Target::Arch arch
bool get_runtime_compatible_target(const Target &other, Target &result)
Create a "greatest common denominator" runtime target that is compatible with both this target and ot...
@ halide_target_feature_vulkan_int16
Enable Vulkan 16-bit integer support.
@ BdVer2
Tune for AMD Bulldozer CPU (AMD Family 15h, launched 2011).
bool has_feature(halide_target_feature_t f) const
@ halide_target_feature_avx512_cannonlake
Enable the AVX512 features expected to be supported by future Cannonlake processors....
@ halide_llvm_large_code_model
Use the LLVM large code model to compile.
@ halide_target_feature_egl
Force use of EGL support.
@ halide_target_feature_trace_loads
Trace all loads done by the pipeline. Equivalent to calling Func::trace_loads on every non-inlined Fu...
Target(OS o, Arch a, int b, Processor pt, const std::vector< Feature > &initial_features=std::vector< Feature >(), int vb=0)
@ halide_target_feature_c_plus_plus_mangling
Generate C++ mangled names for result function, et al.
@ halide_target_feature_wasm_sat_float_to_int
Enable saturating (nontrapping) float-to-int instructions for WebAssembly codegen.
int get_cuda_capability_lower_bound() const
Get the minimum cuda capability found as an integer.
@ halide_target_feature_sve2
Enable ARM Scalable Vector Extensions v2.
@ halide_target_feature_metal
Enable the (Apple) Metal runtime.
@ halide_target_feature_hexagon_dma
Enable Hexagon DMA buffers.
@ halide_target_feature_vsx
Use VSX instructions. Only relevant on POWERPC.
@ halide_target_feature_hvx_v62
Enable Hexagon v62 architecture.
Target without_feature(Feature f) const
Return a copy of the target with the given feature cleared.
@ halide_target_feature_fma4
Enable x86 (AMD) FMA4 instruction set.
@ halide_target_feature_vulkan_float64
Enable Vulkan 64-bit float support.
@ halide_target_feature_avx512_sapphirerapids
Enable the AVX512 features supported by Sapphire Rapids processors. This include all of the Cannonlak...
A struct representing a target machine and os to generate code for.
bool features_any_of(const std::vector< Feature > &test_features) const
Target(OS o, Arch a, int b, const std::vector< Feature > &initial_features=std::vector< Feature >())
@ halide_target_feature_arm_dot_prod
Enable ARMv8.2-a dotprod extension (i.e. udot and sdot instructions)
@ halide_target_feature_rvv
Enable RISCV "V" Vector Extension.
@ halide_target_feature_f16c
Enable x86 16-bit float support.
bool has_large_buffers() const
Return true iff 64 bits and has_feature(LargeBuffers).
DeviceAPI
An enum describing a type of device API.
@ halide_target_feature_sanitizer_coverage
Enable hooks for SanitizerCoverage support.