Go to the documentation of this file. 1 #ifndef HALIDE_HALIDERUNTIMEHEXAGONDMA_H
2 #define HALIDE_HALIDERUNTIMEHEXAGONDMA_H
9 #ifndef HALIDE_HALIDERUNTIME_H
16 #ifndef HALIDE_HALIDERUNTIMEHEXAGONHOST_H
83 void *dma_engine,
bool is_ubwc,
104 #endif // HALIDE_HALIDERUNTIMEHEXAGONDMA_H
@ halide_hexagon_fmt_RawData
@ halide_hexagon_fmt_P010
halide_hexagon_power_mode_t
Power modes for Hexagon.
@ halide_hexagon_fmt_NV12
@ halide_hexagon_fmt_P010_Y
int halide_hexagon_dma_deallocate_engine(void *user_context, void *dma_engine)
This API free up the allocated DMA engine.
int halide_hexagon_dma_device_detach_native(void *user_context, struct halide_buffer_t *buf)
Detach the Input/Output Buffer from DMA device handle and deallocate the DMA device handle buffer all...
unsigned __INT64_TYPE__ uint64_t
@ halide_hexagon_fmt_TP10_Y
@ halide_hexagon_fmt_NV124R_UV
int halide_hexagon_dma_unprepare(void *user_context, struct halide_buffer_t *buf)
This API is used to frees up the DMA Resources associated with the buffer.
const struct halide_device_interface_t * halide_hexagon_dma_device_interface()
@ halide_hexagon_fmt_TP10
@ halide_hexagon_fmt_NV12_UV
@ halide_hexagon_fmt_NV124R_Y
@ halide_hexagon_fmt_NV12_Y
@ halide_hexagon_fmt_TP10_UV
int halide_hexagon_dma_power_mode_voting(void *user_context, halide_hexagon_power_mode_t cornercase)
This API is used to setup the hexagon Operation modes.
int halide_hexagon_dma_prepare_for_copy_to_device(void *user_context, struct halide_buffer_t *buf, void *dma_engine, bool is_ubwc, halide_hexagon_image_fmt_t fmt)
This API Prepares a buffer for DMA Write Operation.
The raw representation of an image passed around by generated Halide code.
int halide_hexagon_dma_device_wrap_native(void *user_context, struct halide_buffer_t *buf, uint64_t mem)
This API is used to set up the DMA device interface to be used for DMA transfer.
int halide_hexagon_dma_prepare_for_copy_to_host(void *user_context, struct halide_buffer_t *buf, void *dma_engine, bool is_ubwc, halide_hexagon_image_fmt_t fmt)
This API Prepares a buffer for DMA Read Operation.
Each GPU API provides a halide_device_interface_t struct pointing to the code that manages device all...
@ halide_hexagon_fmt_NV124R
int halide_hexagon_dma_allocate_engine(void *user_context, void **dma_engine)
This API will allocate a DMA Engine needed for DMA read/write.
halide_hexagon_image_fmt_t
Image Formats to prepare the application for DMA Transfer.
@ halide_hexagon_fmt_P010_UV